摘要 |
<p>A BiCMOS tri-state output buffer including logic for preventing reverse biasing of the output transistors. A pair of bipolar transistors (12, 14) are configured as a totem-pole output circuit. A transmission gate (38) provides a controllable-resistance current path between the base and emitter of the emitter-follower transistor (12). Logic circuitry (26, 54, 44, 46) causes the resistance of the path to go low when the circuit is in its disabled or high-impedance "off" state and when the output undergoes a high-to-low transition when the circuit is not disabled, thereby preventing reverse bias of the emitter-follower output transistor. <IMAGE></p> |