发明名称 |
Digital processing system including plural memory devices and data transfer circuitry |
摘要 |
A digital processing system includes first and second processors and first and second random access memories (RAMs) respectively associated with the first and second processors. Each of the first and second RAMs includes a plurality of independent memory cells, each cell in the first RAM having associated therewith a corresponding cell in the second RAM. Input/output circuitry provides independent access by the first processor to the first RAM and by the second processor to the second RAM. Control logic is responsive to a transfer control signal to simultaneously transfer data stored in the memory cells of one of the first and second RAMs into the corresponding cells of the other of the first and second RAMs. Data may be selectively transferred such that only data stored in selected memory cells is transferred between the first and second RAMs.
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申请公布号 |
US5287485(A) |
申请公布日期 |
1994.02.15 |
申请号 |
US19930041129 |
申请日期 |
1993.03.31 |
申请人 |
DIGITAL EQUIPMENT CORPORATION |
发明人 |
UMINA, LEONARD J.;ANSELMO, ROBERT A. |
分类号 |
G11C11/00;(IPC1-7):G06F13/00;G11C11/413 |
主分类号 |
G11C11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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