| 摘要 |
The video data compressing system includes a video compressing/expanding processor for compressing/expanding video data, a start signal generator for supplying a start signal to the video compressing/expanding processor, an address generator for supplying an address signal to the video compressing/expanding processor, a control signal generator for supplying a control signal to respective components of the system, a latch for latching compressed data output to the video compressing/expanding processor, a 32/8 bit converter for converting 32 bits of compressed data supplied from the latch into eight bits, a memory for storing the 8-bit compressed data output to the 32/8 bit converter, and a clock signal generator for supplying a clock signal, thereby enabling a real-time processing.
|
