| 摘要 |
A transistor device (10) includes an epitaxial layer (14) formed on a semiconductor substrate layer (12). A base layer (16) is formed on the epitaxial layer (14) and a source layer (18) is formed on the base layer (16). A trench region (22) is formed extending through the source layer (18), the base layer (16), and the epitaxial layer (14) and into the semiconductor substrate layer (12). An oxide layer (24) is formed on the source layer (18) and on the internal walls of the trench region (22) such that the oxide layer (24) is wider at the bottom of the trench region (22) than at the top in order to handle high voltage applications. A gate layer (26) is formed within the trench region (22) on the oxide layer (24). The gate layer (26) causes a drift region formed within the epitaxial layer (14) to fully deplete under full rated blocking conditions, decreasing the drift region component of the on-resistance which is the dominant parameter in very high voltage devices.
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