| 摘要 |
<p>It is known to bring the surface into the inverted state in CCD imaging devices with buried channels during the integration period in order to keep the dark current low (All Gates Pinning). The desired potential profile, with wells in which the charge is integrated bounded by potential barriers, is obtained through the use of a two-phase structure with a doping profile in the channel or with a gate oxide having thickness differences. Owing to limiting conditions which hold for the clock voltages used for charge transport, serious limitations are imposed on the depth of the potential wells and thus also on the charge storage capacity of the pixels. This disadvantage is counteracted by the operation of the device not as a two-phase but, for example, as a four-phase CCD according to the invention, whereby a d.c. shift is present between the clock voltages for compensating the built-in, comparatively great potential differences described above. An imaging device is obtained thereby with a low dark current, a great charge storage capacity per pixel, and a high transport efficiency. <IMAGE></p> |
