发明名称 Method of manufacturing a semiconductor device having a memory cell and peripheral circuit including forming a first electrode for the capacitor
摘要 According to this invention, a conductive film for forming a plate electrode of a capacitor constituting a memory cell is patterned in only a memory cell region at first. After the conductive film in a peripheral circuit region is used as a stopper for wet-etching a low-melting insulating film of the peripheral circuit region, the conductive film is patterned using the same mask as the low-melting insulating film or the low-melting insulating film itself as a mask. For this reason, an SiN film formed by a low pressure CVD method is not used as a stopper, and an additional lithographic step is not required. Therefore, while a memory cell region is planarized and the step of the peripheral circuit region is reduced, data retaining characteristics can be improved without increasing the number of steps.
申请公布号 US5346843(A) 申请公布日期 1994.09.13
申请号 US19920871705 申请日期 1992.04.21
申请人 SONY CORPORATION 发明人 KURODA, HIDEAKI
分类号 H01L27/10;H01L21/8242;H01L27/105;H01L27/108;(IPC1-7):H01L21/70;H01L27/00 主分类号 H01L27/10
代理机构 代理人
主权项
地址