| 摘要 |
A multiplexed synchronous/asynchronous data bus (109) is disclosed in which three bus lines (T, R, C) are used to convey bidirectional synchronous data between at least two data devices (605, 607, 609, 611) at a relatively low data rate. Valid half duplex asynchronous data is applied at a higher data transfer rate to one of the three bus lines when only one of the bus lines is held in a logic high state. <IMAGE>
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| 申请人 |
MOTOROLA, INC., SCHAUMBURG, ILL., US |
发明人 |
WILSON, GREGORY P., LAKE ZURICH, ILL., US;POTRATZ, BRYAN A., PALATINE, ILL., US;WALCZAK, THOMAS J., PALATINE, ILL., US;MULLINS, JEFFERY L., CUPERTINO, CALIF., US;PRILL, MARK E., LAKE ZURICH, ILL., US |
