发明名称 Integrated circuit metal film interconnect having enhanced resistance to electromigration
摘要 For enhanced resistance to electromigration failure, a thin metal film interconnect on an integrated circuit chip should use multiple parallel minimum-width lines when the minimum linewidth is less than one and one-half times the mean grain size of the metal film. When the interconnect is longer than a certain predetermined length, then the multiple lines of the interconnect should have intermediate interconnections or bridges between neighboring ones of the multiple lines. When the interconnect is many times longer than the predetermined length, then the bridges define slots between the neighboring lines, and the slots should have a length of about the predetermined length. When the interconnect is many times longer than the predetermined length and the interconnect has more than two parallel lines, then the slots on one side of a parallel line should be staggered or offset with respect to the slots on the other side of the parallel line. The predetermined length should be about ten to twenty times the mean length of polycrystalline segments in a line of the minimum linewidth. For a 1.25 mu m minimum linewidth and a 7,600 ANGSTROM thick Al-1% Cu film having a 3.0 micron mean grain size, the predetermined length should be about 46 to 92 microns.
申请公布号 US5382831(A) 申请公布日期 1995.01.17
申请号 US19920990222 申请日期 1992.12.14
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 ATAKOV, EUGENIA M.;CLEMENT, JOHN J.;LEE, BRIAN C.
分类号 H01L23/528;H01L23/532;(IPC1-7):H01L23/48;H01L29/40 主分类号 H01L23/528
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