发明名称 FIFO CIRCUIT FOR MONITOR
摘要 The circuit supports the page mode method with 16 colors and refreshes the monitor after reading 4 bytes data from memory. A buffer (1) stores 4 bytes data applied from memory with 4 plans, and transmits the data to a buffer (2) according to activation of a page end signal. The transmitted data in a buffer (2) is reorganized by a combination of each bit in the data to represent 16 colors and the reorganized data is stored into 1 port CMOS SRAM (9). The 16 bits data of the SRAM is transmitted to a buffer (10) by activation of display area, and the buffer (10) outputs 4 bits data according to a video clock.
申请公布号 KR950001597(B1) 申请公布日期 1995.02.27
申请号 KR19920026865 申请日期 1992.12.30
申请人 HYUNDAI ELECTRONICS CO., LTD. 发明人 HA, JAE - MYONG;HONG, JONG - HYOK;KIM, SUNG - MIN
分类号 G06F3/14;(IPC1-7):G06F3/14 主分类号 G06F3/14
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