Correction and modification of microprocessor chip operations.

摘要

A correction of microprocessor chip design errors is achieved by identifying selected sets of instructions an/or selected sets of instruction sequences in an erroneous control flow of the microprocessor and/or by identifying selected sets of interface control and status signals. A match selectively initiates a corrective action by interfering with the instruction flow in the microprocessor chip or by requesting external control from an associated processor unit. Alternatively, a match is used for a programmable modification of interface control and status signals to adapt the chip to changes of its environment without redesign. A programmable on-chip detector logic (52, 54, 56, 60) is set by select and mask registers (64 to 69) to identify in an erroneous control flow a selected instruction and mode of operation, a selected sequence of instructions and a selected set of interface control and status signals. Programmable logic means (80) assign match condition signals to escape control lines (111 to 120) to initiate a corrective interference with the control flow of the microprocessor chip or an interrupt request to an associated processing unit performing a sequence of corrective operations by or instead of the microprocessor chip, or to perform a correction of certain interface signals. The detector logic and the related registers are multiplied to simultaneously handle classes of different errors. A signal modification facility (130, 138, 139, 170) allows to select chip interface control and status lines to modify, insert or suppress input and output interface control and status signals.