发明名称 |
FLIP-FLOP WITH SCAN PATH |
摘要 |
An improved flip-flop with a scan path comprises a front page circuit driven in response to a clock signal and multiplexers for receiving a data signal and a scan test signal. Each of the multiplexers comprises a single stage of FETs connected in series between a power source and a ground. This arrangement can remarkably improve an operation frequency. |
申请公布号 |
KR950010723(B1) |
申请公布日期 |
1995.09.22 |
申请号 |
KR19910010433 |
申请日期 |
1991.06.24 |
申请人 |
TOSHIBA CORP.;TOSHIBA MICRO ELECTRONICS K.K. |
发明人 |
KUTO, TSUNEAKI;NAKAMURA, NAOKO |
分类号 |
G01R31/28;G06F11/267;H01L21/66;H03K3/037;H03K17/693;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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