发明名称 DUAL CARRY CHAIN ADDER
摘要 propagate signal generating circuits for inputting a predetermined bit of data and generating a propagate signal; carry circuits for generating group carries from the propagate signal by a carry prediction equation; and adding carry chains for receiving the group carry as a least significant bit carry, calculating the addition of corresponding bit and generating a carry.
申请公布号 KR950015179(B1) 申请公布日期 1995.12.23
申请号 KR19930015179 申请日期 1993.08.05
申请人 GOLDSTAR ELECTRON CO., LTD. 发明人 KANG, MYUNG - SU
分类号 G06F7/50;(IPC1-7):G06F7/50 主分类号 G06F7/50
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