发明名称 Method for making a high capacitance multi-level storage node for high density TFT load SRAMS with low soft error rates
摘要 A method for making high capacitance multi-level storage node contact is proposed for high density SRAMs. The proposed contact connects several poly levels to diffusion and to a trench capacitor, in one contact. The high storage node capacitance provided by the trench capacitor substantially reduces the soft error rate probability of the cell. The use of a single contact to connect several levels reduces the area. The contact preferably uses TiN as a barrier layer to reduce dopant diffusion between different poly layers.
申请公布号 US5489544(A) 申请公布日期 1996.02.06
申请号 US19950386845 申请日期 1995.02.10
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 RAJEEVAKUMAR, THEKKEMADATHIL V.
分类号 H01L21/8244;H01L27/10;H01L27/11;H01L29/786;(IPC1-7):H01L21/824 主分类号 H01L21/8244
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