| 摘要 |
A P type source region is formed in a grid mesh-like pattern in one major surface portion of an N- type semiconductor substrate. A P type base region and P- type base region are each formed in the one major surface portion of the N- type semiconductor substrate at an area between those grid mesh-like portions of the P type source region. An N type emitter region is formed in the P type base region. An N type emitter region is formed in the P- type base region. A gate electrode is formed over the P type source region, N- type semiconductor substrate, P type base region and P- type base region. The gate electrode is formed in a grid mesh-like pattern as viewed from above the N- type semiconductor substrate. A cathode electrode is contacted with the P type source region, P- type base region and N type emitter regions. A P+ type emitter layer is formed on an other major surface side of the N- type semiconductor substrate. An N+ type buffer layer is formed between the N- type semiconductor substrate and the P+ type emitter layer. An anode electrode is contacted with the P+ type emitter layer. A cell acts as a switch at a turn-on time and a resultant MCT is rapidly turned on. Those cells alpha and beta have such an arrangement as to improve the turn-off characteristic.
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