发明名称 I/O cells in semiconductor integrated circuits
摘要 A semiconductor integrated circuit device of a master slice system has I/O cells (3) forming an input-output circuit formed so as to be able to select an input function or an output function. The I/O cells (3) are arranged in a radial layout around an internal cell array region (A). Each region forming an I/O cell has smaller and larger circuit elements (3a, 3b), the smaller circuit elements (3a) of the I/O cell forming the input-output circuit being located adjacent the internal cell array region (A), and larger circuit elements (3b) of the I/O cells (3) being adjacent the periphery of the semiconductor pellet (1). Thus, the semiconductor pellet (1) is provided with more regions forming I/O cells than of a conventional semiconductor integrated circuit device on a semiconductor pellet of the same size.
申请公布号 HK28196(A) 申请公布日期 1996.02.23
申请号 HK19960000281 申请日期 1996.02.15
申请人 HITACHI LTD 发明人 YOSHIO SHINTANI
分类号 H01L21/822;H01L21/82;H01L27/02;H01L27/04;H01L27/118 主分类号 H01L21/822
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