发明名称 Method of manufacturing semiconductor device using measurement mark pattern
摘要 A method of manufacturing a semiconductor device, includes the steps of forming a measurement mark of a lower layer on a semiconductor substrate in a photolithography process, forming a measurement mark of an upper layer to be superposed on the measurement mark of the lower layer in the photolithography process, measuring relative sizes between the measurement marks of lower and upper layers in X and Y directions on a plane, and calculating a relative alignment error size between the measurement marks and an error size of the measurement mark with respect to a reference value on the basis of the measured value, wherein a result of the photolithography process is determined on the basis of the calculated error sizes.
申请公布号 US5498877(A) 申请公布日期 1996.03.12
申请号 US19940351174 申请日期 1994.11.30
申请人 NEC CORPORATION 发明人 SHIRAKI, SEIICHI
分类号 H01L21/66;G03F7/20;H01J37/304;H01L21/027;(IPC1-7):H01J37/00 主分类号 H01L21/66
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