A DATA TRANSMISSION SYSTEM

摘要

A data transmission system, in which data streams shall be transmitted with great speed between a sending clock domain and a receiving clock domain, which operate with mutually different clock speeds, includes two system part circuits (202, 206). One (202) of these system part circuits is designed to receive from the first clock domain a data stream (d1) with the clock speed of the first clock domain and, controlled by this clock speed (c11), serial/parallel convert the data stream to parallel data streams each with a clock speed being a certain fraction of the clock speed of the first clock domain. The other system part circuit (206) is designed to receive the parallel data streams (du, d1) and controlled by the clock speed (c12) of the other clock domain parallel/serial converting them to an output data stream (d2), which with the clock speed of the second clock domain is sent to the second clock domain.