发明名称 Device structure and methods of making high density MOSFETs for load switch and DC-DC applications
摘要 Aspects of the present disclosure describe a high density trench-based power. The active devices may have a two-step gate oxide. A lower portion may have a thickness that is larger than the thickness of an upper portion of the gate oxide. A lightly doped sub-body layer may be formed below a body region between two or more adjacent active device structures of the plurality. The sub-body layer extends from a depth of the upper portion of the gate oxide to a depth of the lower portion of the gate oxide It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
申请公布号 US9484453(B2) 申请公布日期 2016.11.01
申请号 US201514845128 申请日期 2015.09.03
申请人 ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED 发明人 Yilmaz Hamza;Bobde Madhur;Chang Hong;Lee Yeeheng;Calafut Daniel;Kim Jongoh;Lui Sik;Chen John
分类号 H01L29/66;H01L29/78;H01L29/423;H01L29/40;H01L29/417;H01L29/06;H01L27/02;H01L29/45;H01L29/08;H01L29/10 主分类号 H01L29/66
代理机构 JDI Patent 代理人 Isenberg Joshua D.;JDI Patent
主权项 1. A MOSFET device, comprising: a semiconductor substrate of a first conductivity type wherein the substrate includes a lightly doped epitaxial region in a top portion of the substrate; a body region of a second conductivity type formed in a top portion of the semiconductor substrate, wherein the second conductivity type is opposite the first conductivity type; a plurality of active device structures formed in trenches in the semiconductor substrate and body region, wherein each active device structure comprises a gate electrode insulated with a gate oxide, wherein an upper portion of the gate oxide is a thickness T1 and a lower portion of the gate oxide is a thickness T2, wherein T2 is greater than T1; one or more source regions of the first conductivity type formed in a top portion of the body region proximate the gate electrode; an insulative gate cap formed over each gate electrode; an insulative layer over a top surface of the body region; a sub-body layer formed below the body region between two or more adjacent active device structures of the plurality, wherein the sub-body layer is a lightly doped region of the second conductivity type, wherein the sub-body layer extends from a depth of the upper portion of the gate oxide to a depth of the lower portion of the gate oxide; a conductive source metal layer formed over the insulative layer; and one or more electrical connections that connect the source metal layer with the one or more source regions.
地址 Sunnyvale CA US