发明名称 |
METHOD FOR FORMING PACKET CONTROL LIST FOR CONTROLLING DMA MACHINE IN PACKET DATA COMMUNICATION SYSTEM, AND FORMAT THEREFOR |
摘要 |
PROBLEM TO BE SOLVED: To reduce the frequency of memory access by allocating a predetermined space in a memory and determining a next-program list address for structuring a program control list in relation with data packet transfer equipment. SOLUTION: A PCI interface ASIC 20 executes a basic function for data packet transmission control between equipment which operates in environment where a PCI bus 24 is supported and equipment which operates in high-speed input/output peripheral equipment environment. Further, the PCI interface ASIC 20 has the function of a cycle master and has lost cycle start message detecting capability. The PCI interface ASIC 20 supports an equal-time-interval barrier between the PCI interface ASIC 20 and a physical layer interface 18 and execute programmable channel address comparator logic for a received input data packet to allocate a DMA channel.
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申请公布号 |
JPH1069456(A) |
申请公布日期 |
1998.03.10 |
申请号 |
JP19970111440 |
申请日期 |
1997.04.28 |
申请人 |
TEXAS INSTR INC <TI> |
发明人 |
BAKER RICHARD T;PIPHO RANDALL E |
分类号 |
G06F13/28;G06F13/00;H04L12/56;(IPC1-7):G06F13/28 |
主分类号 |
G06F13/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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