发明名称 |
An electronic circuit or board tester and a method of testing an electronic device |
摘要 |
<p>This invention relates to electronic circuit testing and more particularly to an apparatus and a method utilizing enhanced test data compression techniques. An electronic circuit or board tester according to the invention comprises one tester circuit with a combination of a sequencer and a vector-sequencer-memory per pin. The test-data-sequence to be applied to a pin of a device under test is compressed in order to save memory space. <IMAGE></p> |
申请公布号 |
EP0758771(B1) |
申请公布日期 |
1998.06.03 |
申请号 |
EP19950112576 |
申请日期 |
1995.08.10 |
申请人 |
HEWLETT-PACKARD GMBH |
发明人 |
HEITELE, WINFRIED;ZSCHIEGNER, STEFAN |
分类号 |
G01R31/3183;G01R31/319;(IPC1-7):G06F11/273;G06F11/263;G01R31/28 |
主分类号 |
G01R31/3183 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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