发明名称 Semiconductor integrated circuit having controllable threshold level
摘要 A semiconductor circuit includes an internal circuit of plural transistors formed in a well of semiconductor substrate and, for each transistor, a threshold level indicator voltage generating circuit which detects a threshold level of the respective one of the plurality of transistors, a control signal generating circuit which generates a control signal in accordance with the threshold level detected by the threshold level indicator voltage generating circuit and a switching circuit responsive to a received control signal for switching to a designated one of plural power supplies of respective, different voltages for connection to the well. The switching circuit is controlled in accordance with the detected threshold level, so that the well is connected to an appropriate power supply. Any variation in the threshold level thereby is corrected since the well potential is controlled to a proper level so that a desired threshold level is obtained, for each of the plural transistors.
申请公布号 US5874851(A) 申请公布日期 1999.02.23
申请号 US19960692595 申请日期 1996.08.06
申请人 FUJITSU LIMITED 发明人 SHIOTA, TETSUYOSHI
分类号 H01L21/8238;G05F3/24;G11C5/14;G11C11/408;H01L27/088;H01L27/092;H03K17/04;H03K17/30;H03K19/00;H03K19/0175;H03K19/094;H03K19/0948;(IPC1-7):G05F1/10;H01L27/04;H03K17/687 主分类号 H01L21/8238
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