| 摘要 |
The circuit has a signal input (In)supplied with an input signal via a switch element (S1), e.g. a transfer gate and an activation input (EN) for switching the circuit between its active and inactive states. In the active state a pair of circuit outputs provide non-inverted and inverted versions of the input signal and in the deactivated state both outputs provide a given logic level. The outputs are coupled to an internal logic (L) for switching the switch element when both outputs have the given logic level and blocking the switch element when both outputs have the opposite logic level.
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