| 摘要 |
PURPOSE: A method for forming a metal interconnection line of a semiconductor device is provided to improve the operating reliability of the device by preventing the formation of voids. CONSTITUTION: In the method, after a gate insulating layer(22) is formed on a semiconductor substrate(21), a polysilicon layer(23a) and a tungsten silicide layer(24a) are sequentially formed thereon. Next, a cap insulating pattern(25a) is formed at regular intervals on the tungsten silicide layer(24a), and the first sidewall insulator is formed on a side of the cap insulating pattern(25a). The tungsten silicide layer(24a) and the polysilicon layer(23a) are then patterned by using the first sidewall insulator and the cap insulating pattern(25a) as a mask. Thereafter, the first sidewall insulator is removed, and a heat treatment is performed. Therefore, the patterned tungsten silicide layer(24a) shrinks more than the cap insulating pattern(25a) or the patterned polysilicon layer(23a) does, and further, the patterned layers(23a,24a,25a) have a positive sloping profile. After that, the second sidewall insulator(28) and an interlayer dielectric layer(29) are formed.
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