发明名称 HIGH SPEED SIGNALING FOR INTERFACING VLSI CMOS CIRCUITS
摘要 A system of the present invention uses small swing differential source synchronous voltage and timing reference (SSVTR and /SSVTR) signals to compare single-ended signals of the same slew rate generated at the same time from the same integrated circuit for high frequency signaling. The SSVTR and /SSVTR signals toggle every time the valid signals are driven by the transmitting integrated circuit. Each signal receiver includes two comparators, one for comparing the signal against SSVTR and the other for comparing the signal against /SSVTR. A present signal binary value determines which comparator is coupled to the receiver output, optionally by using XOR logic with SSVTR and /SSVTR. The coupled comparator in the receiver detects whether change in signal binary value occurred or not until SSVTR and /SSVTR have changed their binary value. The same comparator is coupled if the signal transitions. The comparator is de-coupled if no transition occurs. The system may use a first set of oscillating references on a first bus for detecting transitions in control information and a second set of oscillating references for detecting transitions in data information.
申请公布号 CA2323446(C) 申请公布日期 2016.11.08
申请号 CA19992323446 申请日期 1999.03.08
申请人 JAZIO, INC. 发明人 HAQ, EJAZ UI
分类号 G06F3/00;H03K5/1534;G06F12/00;G06F13/16;H03H11/02;H03K19/0185;H03M9/00;H04L7/00;H04L25/02;H04L25/06 主分类号 G06F3/00
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