MANUFACTURE OF SILICON INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To reduce the influence of a hot carrier by deuterium annealing at a comparatively initial stage in the manufacturing stage of a device and passivating an IC device formed of silicone. SOLUTION: A field oxide layer 12 is grown on a silicon wafer 11 while a part of the wafer 1 is exposed, and a gate dielectric layer 15 is grown on the exposed part 13. A polysilicon layer is stacked on it and a gate electrode 17 is formed from the polysilicon layer. Impurities 18 and 19 for source/drain are implanted into the silicon wafer 11 and the impurities 18 and 19 are annealed in a deuterium atmosphere. An interlevel dielectric layer 21 is stacked on the gate electrode 17, a metallic mutual connection layer is stacked on the interlevel dielectric layer 21 and they are patterned.