| 摘要 |
PROBLEM TO BE SOLVED: To suppress dispersion in characteristics between adjoining memory cell transistors. SOLUTION: A floating gate 4 formed on a gate oxide film 3A on silicon substrate 1, a control gate so formed as to overlap the floating gate 4 through a tunnel oxide film 3 covering the floating gate 4, and source/drain region 7 so formed on a substrate surface layer as to adjoin the floating gate 4 and the control gate, are provided while at least adjoining memory cell parts share the drain region 7. Here, floating gate formation regions of the adjoining memory cell parts and a drain region formation region so formed as to adjoin the control gate are determined in a single mask matching process, so that the dispersion in the effective gate length of each selective gate transistor (approximately La=Lb) is suppressed.
|
