发明名称 |
SWITCHED CAPACITOR BIAS CIRCUIT GENERATING REFERENCE SIGNAL PROPORTIONAL TO ABSOLUTE TEMPERATURE, CAPACITY AND CLOCK FREQUENCY |
摘要 |
PROBLEM TO BE SOLVED: To compensate fluctuation in load capacity and a temperature and to minimize power dissipation by generating bias current proportional to capacity, a clock frequency and an absolute temperature through the use of an integrated capacitor and a duplex sample-type switched capacitor 'resistance' in a PTAT loop proportional to an absolute temperature. SOLUTION: A switched capacitor bias circuit generating a reference signal proportional to an absolute temperature, capacity and a clock signal frequency uses an integrated capacitor CI and a duplex sample-type switched capacitor 'resistor' Sc in a PTAT loop for generating output bias current Ibias proportional to a clock, an absolute temperature and load capacity. Transistors M1, M2, M4 and M5 form a part of a current mirror circuit biased by a bias circuit formed of transistors M3 and M6. Capacitor CI, the switched capacitor Cs and transistors Msa-Msd form a switched capacitor circuit.
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申请公布号 |
JP2000295047(A) |
申请公布日期 |
2000.10.20 |
申请号 |
JP20000060499 |
申请日期 |
2000.03.06 |
申请人 |
NATL SEMICONDUCTOR CORP <NS> |
发明人 |
LEWICKI LAURENCE DOUGLAS;JU SHU-ING |
分类号 |
H03F3/70;G05F3/24;G05F3/26;H03F1/30;H03H11/04;H03K4/08;(IPC1-7):H03F1/30 |
主分类号 |
H03F3/70 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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