发明名称 INTERFACE CIRCUIT AND PHS TERMINAL MACHINE
摘要 PROBLEM TO BE SOLVED: To obtain an interface circuit of a PHS terminal machine which can improve program processing capacity by a control method for hardware taking software into account. SOLUTION: The circuit is composed of a readable/writable register 12, an actuation start circuit 13 which is connected to a data signal of the register 12, and an actuation end monitor circuit 14 which is connected to the clear signal of the register 12. The bit width of the register 12 is matched with the maximum width that a CPU can handle, software processes are all performed with the same bit width, and the number of registers is reduced to a half as large as before to decrease the number of steps of a program, thereby improving the processing capacity.
申请公布号 JP2000330911(A) 申请公布日期 2000.11.30
申请号 JP19990141875 申请日期 1999.05.21
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TORIYA HIROSHI
分类号 G06F13/00;(IPC1-7):G06F13/00 主分类号 G06F13/00
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