| 摘要 |
PROBLEM TO BE SOLVED: To reduce changes in a resistance value of a resistance element due to influence of potential differences with upper layer wiring so that a chip area can be reduced without complicating a wiring layout. SOLUTION: An interconnect line 50 is so formed on an insulating layer 30 formed on a resistance layer 20 as to intersect the resistance layer 20 formed on a semiconductor 10. A hollow air bridge portion A is formed immediately under a portion of the interconnect line 50 at the intersection with the resistance layer 20. Since influence of a wiring potential on the resistance layer 20 can be avoided due to presence of this air bridge A, the resistance value of the resistance layer is prevented from changing. Therefore, the interconnect line 50 and the resistance layer 20 are permitted to intersect, thereby reducing a chip area.
|
