发明名称 SEMICONDUCTOR PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor package substrate which meets the requirements for lighter, thinner, and smaller substrate. SOLUTION: An independent copper circuit pattern comprising no lead wire for partial electrolytic plating is formed, and a solder resist pattern is formed while the surface of solder resist is roughened. The electroless copper is deposited on the entire surface of substrate, and the solder surface is coated with a plating resist pattern before the electroless copper exposed on the part surface and solder surface is dissolved and removed by etching. The pad of part surface, copper-plated through hole, ball pad of solder surface, and electroless copper of solder surface are used as a conductor to deposit a partial electrolytic plated coat at the exposed copper pad. After the plating resist of solder surface is removed, the electroless copper of solder surface is dissolved by etching to form a semiconductor package substrate comprising the pad of electrolytic plated coat.
申请公布号 JP2001110940(A) 申请公布日期 2001.04.20
申请号 JP19990324478 申请日期 1999.10.12
申请人 NIPPON CIRCUIT KOGYO KK 发明人 YASUI HIROBUMI;SEKINE YOSHIHIKO;SHINODA TOSHIAKI;KATO SHINICHI;MASUDA TOSHIO
分类号 H05K3/42;H01L23/12;H05K1/09;H05K3/24;H05K3/34;(IPC1-7):H01L23/12 主分类号 H05K3/42
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