Planar integrated circuit

摘要

A method is provided for a planar surface of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A gate electrode is formed over a substrate having source/drain regions adjacent to the gate electrode and in the substrate. A silicon dioxide layer is formed over the gate electrode and a portion of the substrate not covered by the gate electrode. A first phosphorous doped spin-on-glass layer is formed over the silicon dioxide layer, wherein the spin-on-glass is doped to a concentration sufficient to facilitate gettering of charge mobile ions. An opening is then formed in the spin-on-glass layer and the silicon dioxide layer exposing a portion of the source drain region. <IMAGE>