发明名称 METHOD FOR CALCULATING SOFT ERROR FACTOR OF SEMICONDUCTOR CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a method for calculating soft error factor of semiconductor circuit by which the calculating speed of the soft error factor of a whole semiconductor circuit can be made faster by efficiently calculating the error. SOLUTION: In this method, the net list of the semiconductor circuit on which the soft error factor is to be calculated is read and a transistor constituting a latch circuit is extracted from the read net list. Then circuit simulation required for the calculation of the soft error factor is performed only on the extracted transistor constituting the latch circuit.
申请公布号 JP2001237320(A) 申请公布日期 2001.08.31
申请号 JP20000048439 申请日期 2000.02.25
申请人 FUJITSU LTD 发明人 KANEDA HIROYUKI
分类号 G06F11/26;G06F17/50;H01L21/336;H01L21/82;H01L29/00;H01L29/78;(IPC1-7):H01L21/82 主分类号 G06F11/26
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