发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To simply modify the layout of wiring in a primitive cell that can modify the layout of wiring by FIB machining. SOLUTION: For example, by a CAD tool, dummy wiring Da to Dd of the uppermost layer is provided at a plurality of cells Ia1, Ib1, Ia2, Ib2, and Ia3 for cell-based design being generated, on the basis of the algorithm of automatic arrangement wiring for short-circuiting over the entire cells Ia1, Ib1, Ia2, Ib2, and Ia3. Then, by the FIB machining, the dummy wiring Da to Dd is connected to each of terminals Za1, Bb1, Ab1, Za3, Zb1, Bb2, Za2, and Ab2 via additional wirings Wa', Wb', Wc', and Wd' with the shortest distance.
申请公布号 JP2001267423(A) 申请公布日期 2001.09.28
申请号 JP20000070935 申请日期 2000.03.14
申请人 TOSHIBA MICROELECTRONICS CORP;TOSHIBA CORP 发明人 TSUNODA JUNICHI
分类号 H01L21/822;H01L21/82;H01L27/04;(IPC1-7):H01L21/82 主分类号 H01L21/822
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