| 摘要 |
PROBLEM TO BE SOLVED: To simplify a circuit structure of a field memory having a register block and a sub-register block. SOLUTION: In a Y decoder circuit 30, when a permission signal SEN for a sub-register block is given, column signals CL1-CLm generated by the Y decoder 31 are outputted successively as column signals SCL1-SCLm through NOR 321-32m and given to a sub-register block 10S. When a permission signal for a register block is given, column signals CL1-CLm generated by the Y decoder 31 are outputted successively as column signals RCL1-RCLm through NOR 331-33m and given to a sub-register block 10R. Thereby, Y decoder of the sub-register block 10S and the register block 10R is shared so that the circuit structure is simplified.
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