| 摘要 |
The charge stored in a hold capacitor is prevented from leaking via the switches connected to the electrode of the capacitor, in a sample-and-hold circuit, and the reduction in the voltage held in the capacitor is suppressed, thereby improving the performance of the sample-and-hold circuit. The switches connected to the capacitor comprises two N-channel MOS transistors that are connected in series and are simultaneously turned on or off. During the period that the switches are in the OFF state, the potential at the interconnection node of the two transistors (one end of a first transistor) is set so as to be equal to that of the other end of the first transistor. Since the potential difference between both ends of the first transistor thereby becomes zero, leakage currents via the first transistor is reduced, and charge leakage in the capacitor can be prevented.
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