发明名称 PHASE LOCKED LOOP DEVICE AND METHOD FOR OPERATING THE SAME
摘要 PURPOSE: A phase locked loop(PLL) device is provided to improve a lock time when the PLL applies to a communication system or a control system, thereby increasing the speed of the system and strengthening the competitive power of the products. CONSTITUTION: A PLL device includes a voltage control oscillation(VCO) circuit(180) with a dual slope function. The VCO circuit(180) includes a voltage-current converting circuit(190) for a first bias current and a second bias current in response to a filtered signal as an output voltage from a loop filter and a frequency inducing signal and a ring oscillator(200) for generating an output signal in response to the first bias current and the second bias current. The PLL device is capable of improving the lock time of the PLL by selecting an output frequency with a negative slope or an output frequency with a positive slope base on a situation. It is possible that the PLL device generates an output signal with dual slopes by applying the frequency inducing signal to the VCO circuit(180) together with the filtered signal at the same time.
申请公布号 KR20020059475(A) 申请公布日期 2002.07.13
申请号 KR20010000853 申请日期 2001.01.06
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, JU HYEONG
分类号 H03L7/08;(IPC1-7):H03L7/08 主分类号 H03L7/08
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