发明名称 |
Ferroelectric transistor and memory cell configuration with the ferroelectric transistor |
摘要 |
A first source-drain region, a channel region, and a second source-drain region are arranged one after another in a semiconductor substrate. At least the surface of the channel region and parts of the first source-drain region are covered by a dielectric layer. A ferroelectric layer is disposed on the surface of the dielectric layer between two polarization electrodes. A gate electrode is arranged on the surface of the dielectric layer. The thickness of the dielectric layer is dimensioned such that a remanent polarization of the ferroelectric layer, which is aligned between the two polarization electrodes, produces compensation charges in part of the channel region. The ferroelectric transistor is suitable as a memory cell for a memory cell configuration.
|
申请公布号 |
US2002117702(A1) |
申请公布日期 |
2002.08.29 |
申请号 |
US20020113418 |
申请日期 |
2002.04.01 |
申请人 |
STENGL REINHARD;REISINGER HANS;HANEDER THOMAS;BACHHOFER HARALD |
发明人 |
STENGL REINHARD;REISINGER HANS;HANEDER THOMAS;BACHHOFER HARALD |
分类号 |
H01L21/8247;H01L21/8246;H01L27/105;H01L29/51;H01L29/78;H01L29/788;H01L29/792;(IPC1-7):H01L29/76;H01L29/94 |
主分类号 |
H01L21/8247 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|