发明名称 MEMORY USING GLOBAL INPUT OUTPUT LINE BUFFER FOR HIGH SPEED DATA TRANSPORT
摘要 PURPOSE: A memory using a global input output line buffer for high speed data transport is provided, which can operate in a high speed while writing or reading data by adding a buffer circuit to a global input output line in the memory. CONSTITUTION: A memory bank part(100) comprises a number of memory banks. Each memory bank comprises a memory cell(110) arranged in a row and column direction, and a bit line sense amp(120) sensing data of the memory cell, and a write driver(150) amplifying data on a bus applied via data input output buffers to write data to the memory cell and supplying the amplified signal to the bit line sense amp, and a data bus sense amp(140) amplifying an output of the bit line sense amp, and a local input output line(130) connecting the bit line sense amp and the data bus sense amp. A control signal generation part(300) generates the first control signal while the memory performs a read operation, and generates the second control signal while the memory performs a write operation. A global input output line buffer part(200) buffers outputs of the data bus sense amps in the memory bank part by the first control signal and then transports them to the input output pad part during the read operation of the memory, and buffers data on the bus by the second control signal and then supplies it to the write drivers in the memory bank part during the write operation of the memory. And an input output pad part(400) buffers data to be transported to the global input output line buffer part during the write operation, and amplifies data applied from the global input output line buffer part and then transports it through the bus during the read operation.
申请公布号 KR20020084531(A) 申请公布日期 2002.11.09
申请号 KR20010023874 申请日期 2001.05.02
申请人 HYNIX SEMICONDUCTOR INC. 发明人 HAN, SANG SIN
分类号 G11C7/10;(IPC1-7):G11C7/10 主分类号 G11C7/10
代理机构 代理人
主权项
地址