Method for driving nonvolatile semiconductor memory device

摘要

In erasing operation, a main bit line discharge signal CPO is set at a voltage of Vss so as for a main bit line discharge transistor CP to put a main bit line BL in a floating state. A substrate signal is set at Vds to charge a local bit line LBL to Vds. A drain select gate signal DSG is set at Vleg (<(Vds+Vth)) which makes a half-conducting state between the main bit line BL and the local bit line LBL. Thereby, the main bit line BL is charged to Vmbl (=Vleg-Vth(ST)) which lowers potential differences between a drain and a source of the select transistor ST and between a drain and a source of the main bit line discharge transistor CP.