发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a phase locked loop circuit that can reduce a phase lock time without causing a frequency jump at start of phase locking. SOLUTION: The phase locked loop circuit for generating an output signal phase-locked to a reference input signal is provided with a phase comparator that compares a phase of the reference input signal with a phase of a signal resulting from frequency-dividing the output signal, a low pass filter that smoothes an output signal of the phase comparator, a voltage-controlled oscillator that outputs an output signal with an oscillated frequency corresponding to a voltage smoothed by the low pass filter, a frequency divider that frequency- divides an output signal of the voltage-controlled oscillator, and a control circuit that generates an enable signal on the basis of the reference input signal and an operation start signal and supplies them to the frequency divider.
申请公布号 JP2003069427(A) 申请公布日期 2003.03.07
申请号 JP20010259545 申请日期 2001.08.29
申请人 TOYO COMMUN EQUIP CO LTD 发明人 CHINDO KOJI
分类号 H03L7/199;(IPC1-7):H03L7/199 主分类号 H03L7/199
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