| 摘要 |
PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device which can reduce the number of times of exposure processing in an element isolation process applying CMP and subsequent process of poly-Si deposition. SOLUTION: By combining CMP of high flatness in which patterning for making the area of an SiO2 film uniform is unnecessary, and regulating the trench width and film thickness of an alignment pattern part for alignment of a semiconductor mask, the number of times of exposure processing is reduced to one. An exposure process for patterning for making the area of the SiO2 film to be polished by CMP uniform and exposure for patterning for imparting step-difference to an alignment mark are covered by the same exposure, thereby reducing the number of times of exposure processing to two.
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