发明名称 LOOP FILTER CIRCUIT IN IS-95C DUAL MODE TERMINAL
摘要 PURPOSE: A loop filter circuit in an IS-95C mode terminal is provided which maintains fast locking time in case of PCS or CDMA mode and maintains long locking time in case of AMPS mode. CONSTITUTION: According to the loop filter circuit which is intervened between a local oscillator(31) outputting a local oscillation signal and a PLL part applying a tuning voltage to the local oscillator, the first capacitor(C1) is connected to an input stage of the local oscillator and its another end is grounded. The first resistor is connected to the input stage of the local oscillator. The second capacitor(C2) is connected to one end of the first resistor and is grounded. The third capacitor(C3) is connected to the input stage of the local oscillator. A switch(SW1) is connected to the third capacitor and its another end is grounded, and is turned on in case of AMPS mode and is turned off in case of PCS or CDMA mode, according to a mode selection signal inputted from the external.
申请公布号 KR20030029247(A) 申请公布日期 2003.04.14
申请号 KR20010061509 申请日期 2001.10.05
申请人 LG ELECTRONICS INC. 发明人 CHO, JEONG HYEON
分类号 H03L7/08;(IPC1-7):H03L7/08 主分类号 H03L7/08
代理机构 代理人
主权项
地址