| 摘要 |
PROBLEM TO BE SOLVED: To make efficient cache access performable by improving a reply data registering method when a cache mistake happens. SOLUTION: Reply data are not directly registered in a cache 1 but registered in a saving buffer 2 first, and after all the reply data are registered, the data are registered in the cache 1. While the reply data are registered in the saving buffer 2, an area on the cache 1 where the reply data are scheduled to be registered (updated) is made to successively hold the data prior to update so that the cache data prior to update can be accessed. While the reply data are registered in the saving buffer 2, the reply data (which are being registered in the saving buffer at present) being the target of access from a CPU can be accessed when the reply data being the target of access have been already registered in the saving buffer.
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