发明名称 METHOD TO DESCRAMBLE THE DATA MAPPING IN MEMORY CIRCUITS
摘要 An automatic method for the generation of a logical hardware test pattern in memory circuits is based on a given physical pattern. The method includes backwards transformation from a given set of logical data patterns. Since the method is automatic, no knowledge of data scrambling inside the memory circuit is required.
申请公布号 KR20030039378(A) 申请公布日期 2003.05.17
申请号 KR20037004512 申请日期 2003.03.28
申请人 发明人
分类号 G06F11/26;G01R31/3183;G01R31/319;G11C29/10;G11C29/56 主分类号 G06F11/26
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