发明名称 |
Memory storage cell based array of counters |
摘要 |
A multi-counter based system having a counter array. Each counter of the array having a memory cell. The system also includes an address decoder coupled to the counter array to select at least one of the memory cells within the counter array and read/write circuitry coupled to the counter array to pass data with the counter array.
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申请公布号 |
US6567340(B1) |
申请公布日期 |
2003.05.20 |
申请号 |
US20010846513 |
申请日期 |
2001.04.30 |
申请人 |
NETLOGIC MICROSYSTEMS, INC. |
发明人 |
NATARAJ BINDIGANAVALE S.;SRINIVASAN VARADARAJAN;KHANNA SANDEEP |
分类号 |
G11C8/04;G11C15/04;H03K3/356;H03K23/56;(IPC1-7):G11C8/00 |
主分类号 |
G11C8/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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