| 发明名称 |
III-V nanowire FET with compositionally-graded channel and wide-bandgap core |
| 摘要 |
A method for fabricating a III-V nanowire. The method may include providing a semiconductor substrate, which includes an insulator, with a wide-bandgap layer on the top surface of the semiconductor substrate; etching the insulator to suspend the wide-bandgap layer; growing a compositionally-graded channel shell over the wide-bandgap layer; forming a gate structure forming spacers on the sidewalls of the gate structure; and forming a doped raised source drain region adjacent to the spacers. |
| 申请公布号 |
US9472658(B2) |
申请公布日期 |
2016.10.18 |
| 申请号 |
US201514962268 |
申请日期 |
2015.12.08 |
| 申请人 |
International Business Machines Corporation |
发明人 |
Basu Anirban;Cohen Guy M.;Majumdar Amlan;Sleight Jeffrey W. |
| 分类号 |
H01L29/775;H01L29/417;H01L29/423;H01L21/285;H01L21/768;H01L29/06;H01L21/3105;H01L29/66;H01L21/02;H01L21/311;H01L29/10;H01L29/207 |
主分类号 |
H01L29/775 |
| 代理机构 |
|
代理人 |
Ashworth Alexa L. |
| 主权项 |
1. A method for fabricating a III-V nanowire, the method comprising:
providing a semiconductor substrate comprising an insulator, wherein a wide-bandgap layer is disposed on a top surface of the semiconductor substrate; etching the insulator to suspend the wide-bandgap layer; growing a compositionally-graded channel shell over the wide-bandgap layer; forming a gate structure and spacers, wherein the spacers are formed on sidewalls of the gate structure; and forming a doped raised source drain region adjacent to the spacers. |
| 地址 |
Armonk NY US |
