发明名称 |
Method for fabricating semiconductor device including self aligned gate |
摘要 |
An method for fabricating a semiconductor device reduces a size of a MOSFET by self aligning a gate electrode with a device isolation insulation film. Thus, the gate electrode is not overlapped with the device isolation insulation film, differently from a conventional method for forming a MOSFET by partially overlapping the gate electrode with the device isolation insulation film in consideration of misalignment and CD variations in a mask process. As a result, a size of the MOSFET is reduced, thereby efficiently achieving the high integration of the semiconductor device.
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申请公布号 |
US6589846(B2) |
申请公布日期 |
2003.07.08 |
申请号 |
US20020293741 |
申请日期 |
2002.11.13 |
申请人 |
DONGBU ELECTRONICS CO., LTD. |
发明人 |
KIM JAE KAP |
分类号 |
H01L21/336;H01L21/28;H01L21/76;H01L21/762;H01L21/8234;H01L27/08;H01L27/088;H01L29/78;(IPC1-7):H01L21/336;H01L21/320 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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