发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To test a semiconductor integrated circuit device at an actual specification speed by executing a masking treatment in the case of a cycle in which collation of an expected value is not required. SOLUTION: The semiconductor integrated circuit device is provided with OR gates 3a, 3b in which an output signal from a functional logic part 1 is compared with expected-value signals from bidirectional buffers 2a, 2b to be set in an input mode in a test and which output an agreement or a disagreement of both signals; and an output circuit which outputs an agreement signal when all of both signals agree and a disagreement signal when any one disagrees. In the OR gates 3a, 3b, a result of the agreement or the disagreement is masked when the collation of the output signal from the part 1 with the expected value is not required. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003227863(A) 申请公布日期 2003.08.15
申请号 JP20020025301 申请日期 2002.02.01
申请人 MITSUBISHI ELECTRIC CORP;RENESAS LSI DESIGN CORP 发明人 TSUGI HIDEKI
分类号 G01R31/28;H01L21/822;H01L27/04;H03K19/00;H03K19/0175;(IPC1-7):G01R31/28;H03K19/017 主分类号 G01R31/28
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