SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To shorten the time for a scan test when performing a scan design in a semiconductor integrated circuit having a hard macro. SOLUTION: This circuit is configured so as to have a scan chain configuration able to be made single line or separated two lines by interposing a selector 12 in an optional scan chain inside the hard macro 11. Hereby, the number of steps per scan chain can be controlled corresponding to the semiconductor integrated circuit, and the time for the scan test can be shortened. COPYRIGHT: (C)2004,JPO