发明名称 |
Method for fabricating metal gates in deep sub-micron devices |
摘要 |
A method for fabricating metal gates in deep sub-micron CMOS devices. The method blanket deposits a transition metal nitride layer on top of a gate dielectric layer for forming gate electrodes for both a PMOS and an NMOS device. After a cap layer is deposited on top of the gate electrode for PMOS, a rapid thermal annealing process is carried out to drive out nitrogen from the transition metal nitride on top of the NMOS. Gate electrodes having different work functions on top of the PMOS and NMOS are thus achieved simultaneously by the same fabrication process.
|
申请公布号 |
US6660577(B2) |
申请公布日期 |
2003.12.09 |
申请号 |
US20020083277 |
申请日期 |
2002.02.23 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD |
发明人 |
CHEN SHENG-HSIUNG;TSAI MING-HSING |
分类号 |
H01L21/28;H01L21/8238;H01L29/49;(IPC1-7):H01L21/824;H01L21/320;H01L21/44;H01L29/76;H01L31/062 |
主分类号 |
H01L21/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|